function CheckIt(action){var i=ans[count];if(!action){if(FORM1.Q1[i].checked){alert("Correct!");}else{alert("Incorrect.");answrong++;}}else{FORM1.Q1[i].checked ? ansright++ : answrong++;}}function CheckScore(){alert("CORRECT: " + ansright + "\nINCORRECT: " + answrong);}function GoBack(){var myEl = document.getElementsByTagName("p");var mySpans = document.getElementsByTagName("span");var qnum = 0;tmpstr="";count--;qnum = count + 1;if(count < 0){count=0;alert("This is the first question!");return;}tmpstr = " " + qnum + ". " + q[count];myEl[1].innerHTML=tmpstr;mySpans[0].innerHTML=a[count];mySpans[1].innerHTML=b[count];mySpans[2].innerHTML=c[count];mySpans[3].innerHTML=d[count];}function GoNext(){var myEl = document.getElementsByTagName("p");var mySpans = document.getElementsByTagName("span");var qnum=0;tmpstr="";CheckIt(1);count++;qnum=count+1;if(count > 134){TestOver();return;}tmpstr=" " + qnum + ". " + q[count];myEl[1].innerHTML=tmpstr;mySpans[0].innerHTML=a[count];mySpans[1].innerHTML=b[count];mySpans[2].innerHTML=c[count];mySpans[3].innerHTML=d[count];ClrRadios();}function TestOver(){var myEl = document.getElementsByTagName("div");var myP = document.getElementsByTagName("p");var endscores = 'Correct: ' + ansright + "
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";myP[1].innerHTML="TEST OVER!";myEl[0].innerHTML=endscores;FORM1.B0.disabled=1;FORM1.B1.disabled=1;FORM1.B2.disabled=1;}function Choose(){navigate("main00.pl?Z=./test/index.html");}function GoStart(){history.go(0);ClrRadios();}function ClrRadios(){FORM1.Q1[0].checked=false;FORM1.Q1[1].checked=false;FORM1.Q1[2].checked=false;FORM1.Q1[3].checked=false;}FORM1.B0.onclick=GoBack;FORM1.B1.onclick=CheckIt;FORM1.B2.onclick=GoNext;FORM1.B4.onclick=GoStart;FORM1.B5.onclick=CheckScore;FORM1.B6.onclick=Choose;var count=0;var ansright=0;var answrong=0;var q=new Array();var ans=new Array();var a=new Array();var b=new Array();var c=new Array();var d=new Array();q[0]="AC is:";a[0]="A. slot that allows attachment of a transceiver for circuitry embedded in the motherboard";b[0]="B. the section of the CPU core that performs the actual computations";c[0]="C. term for the SATA controller";d[0]="D. electricity that regularly shifts polarity";ans[0]="3";q[1]="AHCI is:";a[1]="A. slot that allows attachment of a transceiver for circuitry embedded in the motherboard";b[1]="B. the section of the CPU core that performs the actual computations";c[1]="C. term for the SATA controller";d[1]="D. electricity that regularly shifts polarity";ans[1]="2";q[2]="ALU is:";a[2]="A. slot that allows attachment of a transceiver for circuitry embedded in the motherboard";b[2]="B. the section of the CPU core that performs the actual computations";c[2]="C. term for the SATA controller";d[2]="D. electricity that regularly shifts polarity";ans[2]="1";q[3]="AMR is:";a[3]="A. slot that allows attachment of a transceiver for circuitry embedded in the motherboard";b[3]="B. the section of the CPU core that performs the actual computations";c[3]="C. term for the SATA controller";d[3]="D. electricity that regularly shifts polarity";ans[3]="0";q[4]="APIC is:";a[4]="A. adds more IRQ's and ability to share handlers between multiple CPU's";b[4]="B. describes a drive whose physical recording surface rotates at a constant RPM";c[4]="C. CPU core that allows partial decoding and rearrangement of instructions";d[4]="D. CPU form factor that is surface soldered directly to the motherboard";ans[4]="0";q[5]="ATC is:";a[5]="A. adds more IRQ's and ability to share handlers between multiple CPU's";b[5]="B. describes a drive whose physical recording surface rotates at a constant RPM";c[5]="C. CPU core cache that allows partial decoding and rearrangement of instructions";d[5]="D. CPU form factor that is surface soldered directly to the motherboard";ans[5]="2";q[6]="BGA is:";a[6]="A. adds more IRQ's and ability to share handlers between multiple CPU's";b[6]="B. describes a drive whose physical recording surface rotates at a constant RPM";c[6]="C. CPU core that allows partial decoding and rearrangement of instructions";d[6]="D. CPU form factor that is surface soldered directly to the motherboard";ans[6]="3";q[7]="CAV is:";a[7]="A. adds more IRQ's and ability to share handlers between multiple CPU's";b[7]="B. describes a drive whose physical recording surface rotates at a constant RPM";c[7]="C. CPU core that allows partial decoding and rearrangement of instructions";d[7]="D. CPU form factor that is surface soldered directly to the motherboard";ans[7]="1";q[8]="CCD is:";a[8]="A. generic term for all optical drive media based on the Red book specification";b[8]="B. specific term for optical drive media that adheres to the Red book specification";c[8]="C. light sensitive microchip used as the image recorder in modern cameras and scanners";d[8]="D. term for an obsolete recordable compact disc technology";ans[8]="2";q[9]="CD is:";a[9]="A. generic term for all optical drive media based on the Red book specification";b[9]="B. specific term for optical drive media that adheres to the Red book specification";c[9]="C. light sensitive microchip used as the image recorder in modern cameras and scanners";d[9]="D. term for an obsolete recordable compact disc technology";ans[9]="0";q[10]="CD-DA is:";a[10]="A. generic term for all optical drive media based on the Red book specification";b[10]="B. specific term for optical drive media that adheres to the Red book specification";c[10]="C. light sensitive microchip used as the image recorder in modern cameras and scanners";d[10]="D. term for an obsolete recordable compact disc technology";ans[10]="1";q[11]="CD-MO is:";a[11]="A. generic term for all optical drive media based on the Red book specification";b[11]="B. specific term for optical drive media that adheres to the Red book specification";c[11]="C. light sensitive microchip used as the image recorder in modern cameras and scanners";d[11]="D. term for an obsolete recordable compact disc technology";ans[11]="3";q[12]="CD-R is:";a[12]="A. compact disc media delivered blank and that can be written to one time";b[12]="B. compact disc media delivered blank and that can be written and erased many times";c[12]="C. modification of Red book media with superior EDC, ECC and a file system";d[12]="D. modification of Yellow book media with superior EDC, ECC and native MPEG-1 support";ans[12]="0";q[13]="CD-ROM is:";a[13]="A. compact disc media delivered blank and that can be written to one time";b[13]="B. compact disc media delivered blank and that can be written and erased many times";c[13]="C. modification of Red book media with superior EDC, ECC and a file system";d[13]="D. modification of Yellow book media with superior EDC, ECC and native MPEG-1 support";ans[13]="2";q[14]="CD-ROM XA is:";a[14]="A. compact disc media delivered blank and that can be written to one time";b[14]="B. compact disc media delivered blank and that can be written and erased many times";c[14]="C. modification of Red book media with superior EDC, ECC and a file system";d[14]="D. modification of Yellow book media with superior EDC, ECC and native MPEG-1 support";ans[14]="3";q[15]="CD-RW is:";a[15]="A. compact disc media delivered blank and that can be written to one time";b[15]="B. compact disc media delivered blank and that can be written and erased many times";c[15]="C. modification of Red book media with superior EDC, ECC and a file system";d[15]="D. modification of Yellow book media with superior EDC, ECC and native MPEG-1 support";ans[15]="1";q[16]="CLV is:";a[16]="A. slot that allows attachment of a transceiver for circuitry embedded in the motherboard";b[16]="B. a drive in which the RPM is adjusted so that the data stream passing the heads is constant";c[16]="C. form factor of some 386 chips with rows of fine pins along the sides";d[16]="D. larger form of CLCC used in the 486 CPU packaging";ans[16]="1";q[17]="CLCC is:";a[17]="A. slot that allows attachment of a transceiver for circuitry embedded in the motherboard";b[17]="B. a drive in which the RPM is adjusted so that the data stream passing the heads is constant";c[17]="C. form factor of some 386 chips with rows of fine pins along the sides";d[17]="D. larger form of CLCC used in the 486 CPU packaging";ans[17]="2";q[18]="CNR is:";a[18]="A. slot that allows attachment of a transceiver for circuitry embedded in the motherboard";b[18]="B. a drive in which the RPM is adjusted so that the data stream passing the heads is constant";c[18]="C. form factor of some 386 chips with rows of fine pins along the sides";d[18]="D. larger form of CLCC used in the 486 CPU packaging";ans[18]="0";q[19]="CQFP is:";a[19]="A. slot that allows attachment of a transceiver for circuitry embedded in the motherboard";b[19]="B. a drive in which the RPM is adjusted so that the data stream passing the heads is constant";c[19]="C. form factor of some 386 chips with rows of fine pins along the sides";d[19]="D. larger form of CLCC used in the 486 CPU packaging";ans[19]="3";q[20]="CRIMM is:";a[20]="A. circuitry found in a sound card that converts binary files back into sound";b[20]="B. blank memory module that completes the circuit pathways for a RAMBus system";c[20]="C. one of the two control lines used by a device to communicate with the DMA chip";d[20]="D. first color capable LCD displays developed for laptops running Windows";ans[20]="1";q[21]="CSTN is:";a[21]="A. circuitry found in a sound card that converts binary files back into sound";b[21]="B. blank memory module that completes the circuit pathways for a RAMBus system";c[21]="C. one of the two control lines used by a device to communicate with the DMA chip";d[21]="D. first color capable LCD displays developed for laptops running Windows";ans[21]="3";q[22]="DAC is:";a[22]="A. circuitry found in a sound card that converts binary files back into sound";b[22]="B. blank memory module that completes the circuit pathways for a RAMBus system";c[22]="C. one of the two control lines used by a device to communicate with the DMA chip";d[22]="D. first color capable LCD displays developed for laptops running Windows";ans[22]="0";q[23]="DACK is:";a[23]="A. circuitry found in a sound card that converts binary files back into sound";b[23]="B. blank memory module that completes the circuit pathways for a RAMBus system";c[23]="C. one of the two control lines used by a device to communicate with the DMA chip";d[23]="D. first color capable LCD displays developed for laptops running Windows";ans[23]="2";q[24]="DAO is:";a[24]="A. the entire compact disc content will be recorded in one track";b[24]="B. modern high speed memory technology that moves 4 bits per clock cycle";c[24]="C. first sector of a Microsoft primary partition or logical drive";d[24]="D. electricity that moves continuously in one direction";ans[24]="0";q[25]="DBR is:";a[25]="A. the entire compact disc content will be recorded in one track";b[25]="B. modern high speed memory technology that moves 4 bits per clock cycle";c[25]="C. first sector of a Microsoft primary partition or logical drive";d[25]="D. electricity that moves continuously in one direction";ans[25]="2";q[26]="DC is:";a[26]="A. the entire compact disc content will be recorded in one track";b[26]="B. modern high speed memory technology that moves 4 bits per clock cycle";c[26]="C. first sector of a Microsoft primary partition or logical drive";d[26]="D. electricity that moves continuously in one direction";ans[26]="3";q[27]="DDR2 is:";a[27]="A. the entire compact disc content will be recorded in one track";b[27]="B. modern high speed memory technology that moves 4 bits per clock cycle";c[27]="C. first sector of a Microsoft primary partition or logical drive";d[27]="D. electricity that moves continuously in one direction";ans[27]="1";q[28]="DIB is:";a[28]="A. BIOS that can be configured and monitored from a remote machine";b[28]="B. P6 family feature in which the CPU has two complete front side buses";c[28]="C. standard form factor for integrated circuit chips";d[28]="D. chip that manages data transfers between devices and RAM";ans[28]="1";q[29]="DIP is:";a[29]="A. BIOS that can be configured and monitored from a remote machine";b[29]="B. P6 family feature in which the CPU has two complete front side buses";c[29]="C. standard form factor for integrated circuit chips";d[29]="D. chip that manages data transfers between devices and RAM";ans[29]="2";q[30]="DMA is:";a[30]="A. BIOS that can be configured and monitored from a remote machine";b[30]="B. P6 family feature in which the CPU has two complete front side buses";c[30]="C. standard form factor for integrated circuit chips";d[30]="D. chip that manages data transfers between devices and RAM";ans[30]="3";q[31]="DMI is:";a[31]="A. BIOS that can be configured and monitored from a remote machine";b[31]="B. P6 family feature in which the CPU has two complete front side buses";c[31]="C. standard form factor for integrated circuit chips";d[31]="D. chip that manages data transfers between devices and RAM";ans[31]="0";q[32]="DMM is:";a[32]="A. form of DVD media with two layers of data per side and uses both sides";b[32]="B. electronic test device that can measure resistance, voltage and amperage";c[32]="C. standard for controlling display device power consumption through software";d[32]="D. one of the two lines used by a device to communicate with the DMA chip";ans[32]="1";q[33]="DPMS is:";a[33]="A. form of DVD media with two layers of data per side and uses both sides";b[33]="B. electronic test device that can measure resistance, voltage and amperage";c[33]="C. standard for controlling display device power consumption through software";d[33]="D. one of the two lines used by a device to communicate with the DMA chip";ans[33]="2";q[34]="DREQ is:";a[34]="A. form of DVD media with two layers of data per side and uses both sides";b[34]="B. electronic test device that can measure resistance, voltage and amperage";c[34]="C. standard for controlling display device power consumption through software";d[34]="D. one of the two lines used by a device to communicate with the DMA chip";ans[34]="3";q[35]="DSDL is:";a[35]="A. form of DVD media with two layers of data per side and uses both sides";b[35]="B. electronic test device that can measure resistance, voltage and amperage";c[35]="C. standard for controlling display device power consumption through software";d[35]="D. one of the two lines used by a device to communicate with the DMA chip";ans[35]="0";q[36]="DSSL is:";a[36]="A. early DVD technology that could write and erase the media many times";b[36]="B. generic term for all optical discs based on the first movie video disc specification";c[36]="C. term for DVD delivered blank and that can be written to one time";d[36]="D. a DVD media that uses one layer per side and both sides";ans[36]="3";q[37]="DVD is:";a[37]="A. early DVD technology that could write and erase the media many times";b[37]="B. generic term for all optical discs based on the first movie video disc specification";c[37]="C. term for DVD delivered blank and that can be written to one time";d[37]="D. a DVD media that uses one layer per side and both sides";ans[37]="1";q[38]="DVD-R is:";a[38]="A. early DVD technology that could write and erase the media many times";b[38]="B. generic term for all optical discs based on the first movie video disc specification";c[38]="C. term for DVD delivered blank and that can be written to one time";d[38]="D. a DVD media that uses one layer per side and both sides";ans[38]="2";q[39]="DVD-RAM is:";a[39]="A. early DVD technology that could write and erase the media many times";b[39]="B. generic term for all optical discs based on the first movie video disc specification";c[39]="C. term for DVD delivered blank and that can be written to one time";d[39]="D. a DVD media that uses one layer per side and both sides";ans[39]="0";q[40]="DVD-ROM is:";a[40]="A. modification of the original movie video disc specification for computer data storage";b[40]="B. modern version of a DVD that can be written and erased many times";c[40]="C. modern video controller connector that carries raw digital data to the display";d[40]="D. modern term for the original movie video disc technology";ans[40]="0";q[41]="DVD-RW is:";a[41]="A. modification of the original movie video disc specification for computer data storage";b[41]="B. modern version of a DVD that can be written and erased many times";c[41]="C. modern video controller connector that carries raw digital data to the display";d[41]="D. modern term for the original movie video disc technology";ans[41]="1";q[42]="DVD-V is:";a[42]="A. modification of the original movie video disc specification for computer data storage";b[42]="B. modern version of a DVD that can be written and erased many times";c[42]="C. modern video controller connector that carries raw digital data to the display";d[42]="D. modern term for the original movie video disc technology";ans[42]="3";q[43]="DVI is:";a[43]="A. modification of the original movie video disc specification for computer data storage";b[43]="B. modern version of a DVD that can be written and erased many times";c[43]="C. modern video controller connector that carries raw digital data to the display";d[43]="D. modern term for the original movie video disc technology";ans[43]="2";q[44]="DVI-A is:";a[44]="A. modern video connector that carries only the digital signals to the display";b[44]="B. modern video connector that carries only the analog signals to the display";c[44]="C. modern video connector that carries both analog and digital signals to the display";d[44]="D. electronic test device that can measure voltage";ans[44]="1";q[45]="DVI-D is:";a[45]="A. modern video connector that carries only the digital signals to the display";b[45]="B. modern video connector that carries only the analog signals to the display";c[45]="C. modern video connector that carries both analog and digital signals to the display";d[45]="D. electronic test device that can measure voltage";ans[45]="0";q[46]="DVI-I is:";a[46]="A. modern video connector that carries only the digital signals to the display";b[46]="B. modern video connector that carries only the analog signals to the display";c[46]="C. modern video connector that carries both analog and digital signals to the display";d[46]="D. electronic test device that can measure voltage";ans[46]="2";q[47]="DVM is:";a[47]="A. modern video connector that carries only the digital signals to the display";b[47]="B. modern video connector that carries only the analog signals to the display";c[47]="C. modern video connector that carries both analog and digital signals to the display";d[47]="D. electronic test device that can measure voltage";ans[47]="3";q[48]="ECHS is:";a[48]="A. USB 2.0 bus controller";b[48]="B. translations on the classic BIOS geomtry addressing that supports larger HDD's";c[48]="C. term for BIOS including translations and or LBA HDD addressing capabilities";d[48]="D. modified parallel port that can use the DMA chip to facilitate high speed transfers";ans[48]="1";q[49]="ECP is:";a[49]="A. USB 2.0 bus controller";b[49]="B. translations on the classic BIOS geomtry addressing that supports larger HDD's";c[49]="C. term for BIOS including translations and or LBA HDD addressing capabilities";d[49]="D. modified parallel port that can use the DMA chip to facilitate high speed transfers";ans[49]="3";q[50]="EDD is:";a[50]="A. USB 2.0 bus controller";b[50]="B. translations on the classic BIOS geomtry addressing that supports larger HDD's";c[50]="C. term for BIOS including translations and or LBA HDD addressing capabilities";d[50]="D. modified parallel port that can use the DMA chip to facilitate high speed transfers";ans[50]="2";q[51]="EHCI is:";a[51]="A. USB 2.0 bus controller";b[51]="B. translations on the classic BIOS geomtry addressing that supports larger HDD's";c[51]="C. term for BIOS including translations and or LBA HDD addressing capabilities";d[51]="D. modified parallel port that can use the DMA chip to facilitate high speed transfers";ans[51]="0";q[52]="EIST is:";a[52]="A. Intel term for 64-bit extensions to the x86 family machine language";b[52]="B. CMOS RAM hardware configuration and settings storage for PCI devices";c[52]="C. the CPU's ability to throttle down and reduce voltage when not busy";d[52]="D. modified high speed version of the standard idirectional parallel port";ans[52]="2";q[53]="EM64T is:";a[53]="A. Intel term for 64-bit extensions to the x86 family machine language";b[53]="B. CMOS RAM hardware configuration and settings storage for PCI devices";c[53]="C. the CPU's ability to throttle down and reduce voltage when not busy";d[53]="D. modified high speed version of the standard idirectional parallel port";ans[53]="0";q[54]="EPP is:";a[54]="A. Intel term for 64-bit extensions to the x86 family machine language";b[54]="B. CMOS RAM hardware configuration and settings storage for PCI devices";c[54]="C. the CPU's ability to throttle down and reduce voltage when not busy";d[54]="D. modified high speed version of the standard idirectional parallel port";ans[54]="3";q[55]="ESCD is:";a[55]="A. Intel term for 64-bit extensions to the x86 family machine language";b[55]="B. CMOS RAM hardware configuration and settings storage for PCI devices";c[55]="C. the CPU's ability to throttle down and reduce voltage when not busy";d[55]="D. modified high speed version of the standard idirectional parallel port";ans[55]="1";q[56]="FC-LGA is:";a[56]="A. IBM term for any component that can be easily removed and replaced in the field";b[56]="B. Form factor for Intel processors intended for the Socket T";c[56]="C. Form factor for Intel processors intended for the Socket 370";d[56]="D. Memory cells managed like a queue";ans[56]="1";q[57]="FC-PGA is:";a[57]="A. IBM term for any component that can be easily removed and replaced in the field";b[57]="B. Form factor for Intel processors intended for the Socket T";c[57]="C. Form factor for Intel processors intended for the Socket 370";d[57]="D. Memory cells managed like a queue";ans[57]="2";q[58]="FIFO is:";a[58]="A. IBM term for any component that can be easily removed and replaced in the field";b[58]="B. Form factor for Intel processors intended for the Socket T";c[58]="C. Form factor for Intel processors intended for the Socket 370";d[58]="D. Memory cells managed like a queue";ans[58]="3";q[59]="FRU is:";a[59]="A. IBM term for any component that can be easily removed and replaced in the field";b[59]="B. Form factor for Intel processors intended for the Socket T";c[59]="C. Form factor for Intel processors intended for the Socket 370";d[59]="D. Memory cells managed like a queue";ans[59]="0";q[60]="FSB is:";a[60]="A. industry interconnectivity standard between home entertainment appliances";b[60]="B. very high throughput pathways between the CPU and the chipset members";c[60]="C. the motherboard bus that attaches directly to the pins of the CPU";d[60]="D. the full microprocessor embedded in the video controller";ans[60]="2";q[61]="GPU is:";a[61]="A. industry interconnectivity standard between home entertainment appliances";b[61]="B. very high throughput pathways between the CPU and the chipset members";c[61]="C. the motherboard bus that attaches directly to the pins of the CPU";d[61]="D. the full microprocessor embedded in the video controller";ans[61]="3";q[62]="HDMI is:";a[62]="A. industry interconnectivity standard between home entertainment appliances";b[62]="B. very high throughput pathways between the CPU and the chipset members";c[62]="C. the motherboard bus that attaches directly to the pins of the CPU";d[62]="D. the full microprocessor embedded in the video controller";ans[62]="0";q[63]="HT(AMD) is:";a[63]="A. industry interconnectivity standard between home entertainment appliances";b[63]="B. very high throughput pathways between the CPU and the chipset members";c[63]="C. the motherboard bus that attaches directly to the pins of the CPU";d[63]="D. the full microprocessor embedded in the video controller";ans[63]="1";q[64]="HT(Intel) is:";a[64]="A. HDD addressing that abandons geometric coordinate addressing fiction completely";b[64]="B. organization that publishes industry standards";c[64]="C. ability of the CPU core to emulate a dual core CPU";d[64]="D. Intel processor form factor component, a metal plate that covers and protects the CPU";ans[64]="2";q[65]="IEEE is:";a[65]="A. HDD addressing that abandons geometric coordinate addressing fiction completely";b[65]="B. organization that publishes industry standards";c[65]="C. ability of the CPU core to emulate a dual core CPU";d[65]="D. Intel processor form factor component, a metal plate that covers and protects the CPU";ans[65]="1";q[66]="IHS is:";a[66]="A. HDD addressing that abandons geometric coordinate addressing fiction completely";b[66]="B. organization that publishes industry standards";c[66]="C. ability of the CPU core to emulate a dual core CPU";d[66]="D. Intel processor form factor component, a metal plate that covers and protects the CPU";ans[66]="3";q[67]="LBA is:";a[67]="A. HDD addressing that abandons geometric coordinate addressing fiction completely";b[67]="B. organization that publishes industry standards";c[67]="C. ability of the CPU core to emulate a dual core CPU";d[67]="D. Intel processor form factor component, a metal plate that covers and protects the CPU";ans[67]="0";q[68]="LCD is:";a[68]="A. data held in the first physical storage sector of the HDD";b[68]="B. CPU socket that requires the chip to be pressed into it and pried out of it";c[68]="C. display whose polarized back light can be blocked by passing current through a solution";d[68]="D. microprocessor form factor in which there are no pins, just contacts";ans[68]="2";q[69]="LGA is:";a[69]="A. data held in the first physical storage sector of the HDD";b[69]="B. CPU socket that requires the chip to be pressed into it and pried out of it";c[69]="C. display whose polarized back light can be blocked by passing current through a solution";d[69]="D. microprocessor form factor in which there are no pins, just contacts";ans[69]="3";q[70]="LIF is:";a[70]="A. data held in the first physical storage sector of the HDD";b[70]="B. CPU socket that requires the chip to be pressed into it and pried out of it";c[70]="C. display whose polarized back light can be blocked by passing current through a solution";d[70]="D. microprocessor form factor in which there are no pins, just contacts";ans[70]="1";q[71]="MBR is:";a[71]="A. data held in the first physical storage sector of the HDD";b[71]="B. CPU socket that requires the chip to be pressed into it and pried out of it";c[71]="C. display whose polarized back light can be blocked by passing current through a solution";d[71]="D. microprocessor form factor in which there are no pins, just contacts";ans[71]="0";q[72]="mFC-PGA2 is:";a[72]="A. CPU core component that predicts what data will be needed and prefetches it into cache";b[72]="B. form factor of the Pentium 4 intended for Socket 478";c[72]="C. organization that develops video technologies and standards";d[72]="D. industry standard for communication between electronic music instruments";ans[72]="1";q[73]="MIDI is:";a[73]="A. CPU core component that predicts what data will be needed and prefetches it into cache";b[73]="B. form factor of the Pentium 4 intended for Socket 478";c[73]="C. organization that develops video technologies and standards";d[73]="D. industry standard for communication between electronic music instruments";ans[73]="3";q[74]="MMU is:";a[74]="A. CPU core component that predicts what data will be needed and prefetches it into cache";b[74]="B. form factor of the Pentium 4 intended for Socket 478";c[74]="C. organization that develops video technologies and standards";d[74]="D. industry standard for communication between electronic music instruments";ans[74]="0";q[75]="MPEG is:";a[75]="A. CPU core component that predicts what data will be needed and prefetches it into cache";b[75]="B. form factor of the Pentium 4 intended for Socket 478";c[75]="C. organization that develops video technologies and standards";d[75]="D. industry standard for communication between electronic music instruments";ans[75]="2";q[76]="MPS is:";a[76]="A. support for the P6 family 36-bit wide address bus";b[76]="B. one of the two industry standard USB 1.1 controllers";c[76]="C. specification for architecture and function of systems with more than one CPU";d[76]="D. electrical signaling method used by USB devices";ans[76]="2";q[77]="NRZI is:";a[77]="A. support for the P6 family 36-bit wide address bus";b[77]="B. one of the two industry standard USB 1.1 controllers";c[77]="C. specification for architecture and function of systems with more than one CPU";d[77]="D. electrical signaling method used by USB devices";ans[77]="3";q[78]="OHCI is:";a[78]="A. support for the P6 family 36-bit wide address bus";b[78]="B. one of the two industry standard USB 1.1 controllers";c[78]="C. specification for architecture and function of systems with more than one CPU";d[78]="D. electrical signaling method used by USB devices";ans[78]="1";q[79]="PAE is:";a[79]="A. support for the P6 family 36-bit wide address bus";b[79]="B. one of the two industry standard USB 1.1 controllers";c[79]="C. specification for architecture and function of systems with more than one CPU";d[79]="D. electrical signaling method used by USB devices";ans[79]="0";q[80]="PATA is:";a[80]="A. early 8-bit IRQ controller chip";b[80]="B. early name for the laptop removable expansion card bus";c[80]="C. the first 7 IDE controller technologies that attach the drives with 40-pin IDC cables";d[80]="D. CPU form factor in which the pins are arranged in orthogonal rows and columns";ans[80]="2";q[81]="PCMCIA is:";a[81]="A. early 8-bit IRQ controller chip";b[81]="B. early name for the laptop removable expansion card bus";c[81]="C. the first 7 IDE controller technologies that attach the drives with 40-pin IDC cables";d[81]="D. CPU form factor in which the pins are arranged in orthogonal rows and columns";ans[81]="1";q[82]="PGA is:";a[82]="A. early 8-bit IRQ controller chip";b[82]="B. early name for the laptop removable expansion card bus";c[82]="C. the first 7 IDE controller technologies that attach the drives with 40-pin IDC cables";d[82]="D. CPU form factor in which the pins are arranged in orthogonal rows and columns";ans[82]="3";q[83]="PIC is:";a[83]="A. early 8-bit IRQ controller chip";b[83]="B. early name for the laptop removable expansion card bus";c[83]="C. the first 7 IDE controller technologies that attach the drives with 40-pin IDC cables";d[83]="D. CPU form factor in which the pins are arranged in orthogonal rows and columns";ans[83]="0";q[84]="PIO is:";a[84]="A. larger form of PLCC used in the 486 CPU packaging";b[84]="B. form factor of some 386 chips with rows of fine pins along the sides";c[84]="C. standard that allows devices to be automatically detected and configured";d[84]="D. ATA data transfer modes in which the CPU executes the data transfer rather than DMA";ans[84]="3";q[85]="PLCC is:";a[85]="A. larger form of PLCC used in the 486 CPU packaging";b[85]="B. form factor of some 386 chips with rows of fine pins along the sides";c[85]="C. standard that allows devices to be automatically detected and configured";d[85]="D. ATA data transfer modes in which the CPU executes the data transfer rather than DMA";ans[85]="1";q[86]="PNP is:";a[86]="A. larger form of PLCC used in the 486 CPU packaging";b[86]="B. form factor of some 386 chips with rows of fine pins along the sides";c[86]="C. standard that allows devices to be automatically detected and configured";d[86]="D. ATA data transfer modes in which the CPU executes the data transfer rather than DMA";ans[86]="2";q[87]="PQFP is:";a[87]="A. larger form of PLCC used in the 486 CPU packaging";b[87]="B. form factor of some 386 chips with rows of fine pins along the sides";c[87]="C. standard that allows devices to be automatically detected and configured";d[87]="D. ATA data transfer modes in which the CPU executes the data transfer rather than DMA";ans[87]="0";q[88]="QDR is:";a[88]="A. standard analog data display format";b[88]="B. video grpahics standard that defines 2048 x 1536 pixel resolution";c[88]="C. electronic signaling technique that transfers 4 bits per clock cycle";d[88]="D. chip that scans a region of memory and renders the analog display output voltages";ans[88]="2";q[89]="QXGA is:";a[89]="A. standard analog data display format";b[89]="B. video grpahics standard that defines 2048 x 1536 pixel resolution";c[89]="C. electronic signaling technique that transfers 4 bits per clock cycle";d[89]="D. chip that scans a region of memory and renders the analog display output voltages";ans[89]="1";q[90]="RAMDAC is:";a[90]="A. standard analog data display format";b[90]="B. video grpahics standard that defines 2048 x 1536 pixel resolution";c[90]="C. electronic signaling technique that transfers 4 bits per clock cycle";d[90]="D. chip that scans a region of memory and renders the analog display output voltages";ans[90]="3";q[91]="RGB is:";a[91]="A. standard analog data display format";b[91]="B. video grpahics standard that defines 2048 x 1536 pixel resolution";c[91]="C. electronic signaling technique that transfers 4 bits per clock cycle";d[91]="D. chip that scans a region of memory and renders the analog display output voltages";ans[91]="0";q[92]="RMS is:";a[92]="A. method of measuring AC voltage";b[92]="B. general purpose high speed expansion bus that supports 7 or more hard drives";c[92]="C. modern high speed industry standard IDE hard drive controller";d[92]="D. hardware handshake used by the standard serial port";ans[92]="0";q[93]="RTS/CTS is:";a[93]="A. method of measuring AC voltage";b[93]="B. general purpose high speed expansion bus that supports 7 or more hard drives";c[93]="C. modern high speed industry standard IDE hard drive controller";d[93]="D. hardware handshake used by the standard serial port";ans[93]="3";q[94]="SATA is:";a[94]="A. method of measuring AC voltage";b[94]="B. general purpose high speed expansion bus that supports 7 or more hard drives";c[94]="C. modern high speed industry standard IDE hard drive controller";d[94]="D. hardware handshake used by the standard serial port";ans[94]="2";q[95]="SCSI is:";a[95]="A. method of measuring AC voltage";b[95]="B. general purpose high speed expansion bus that supports 7 or more hard drives";c[95]="C. modern high speed industry standard IDE hard drive controller";d[95]="D. hardware handshake used by the standard serial port";ans[95]="1";q[96]="SC-242 is";a[96]="A. RAM modified and optimized for use on video controllers";b[96]="B. the Intel CPU form factor support of Slot 1";c[96]="C. the Intel CPU form factor used by the first Pentium II";d[96]="D. the Intel CPU form factor used mainly by Pentium II Celerons";ans[96]="1";q[97]="SECC is:";a[97]="A. RAM modified and optimized for use on video controllers";b[97]="B. the Intel CPU form factor support of Slot 1";c[97]="C. the Intel CPU form factor used by the first Pentium II";d[97]="D. the Intel CPU form factor used mainly by Pentium II Celerons";ans[97]="2";q[98]="SEPP is:";a[98]="A. RAM modified and optimized for use on video controllers";b[98]="B. the Intel CPU form factor support of Slot 1";c[98]="C. the Intel CPU form factor used by the first Pentium II";d[98]="D. the Intel CPU form factor used mainly by Pentium II Celerons";ans[98]="3";q[99]="SGRAM is:";a[99]="A. RAM modified and optimized for use on video controllers";b[99]="B. the Intel CPU form factor support of Slot 1";c[99]="C. the Intel CPU form factor used by the first Pentium II";d[99]="D. the Intel CPU form factor used mainly by Pentium II Celerons";ans[99]="0";q[100]="SIMD is:";a[100]="A. new form of multimedia CPU instruction introduced in the P6 family";b[100]="B. parallel processing method in which all processors share the work equally";c[100]="C. nVidea technology for allowing two video cards to share graphics processing";d[100]="D. hard drive techology that allows the drive to detect and warn of imminent failure";ans[100]="0";q[101]="SLI is:";a[101]="A. new form of multimedia CPU instruction introduced in the P6 family";b[101]="B. parallel processing method in which all processors share the work equally";c[101]="C. nVidea technology for allowing two video cards to share graphics processing";d[101]="D. hard drive techology that allows the drive to detect and warn of imminent failure";ans[101]="2";q[102]="SMART is:";a[102]="A. new form of multimedia CPU instruction introduced in the P6 family";b[102]="B. parallel processing method in which all processors share the work equally";c[102]="C. nVidea technology for allowing two video cards to share graphics processing";d[102]="D. hard drive techology that allows the drive to detect and warn of imminent failure";ans[102]="3";q[103]="SMP is:";a[103]="A. new form of multimedia CPU instruction introduced in the P6 family";b[103]="B. parallel processing method in which all processors share the work equally";c[103]="C. nVidea technology for allowing two video cards to share graphics processing";d[103]="D. hard drive techology that allows the drive to detect and warn of imminent failure";ans[103]="1";q[104]="SODIMM is:";a[104]="A. originally the term for the unidirectional parallel port";b[104]="B. form factor of the first 3.3V Pentium processors";c[104]="C. standard for high integrity digital sound cables and connectors";d[104]="D. reduced pin count and smaller sized laptop RAM module";ans[104]="3";q[105]="SPGA is:";a[105]="A. originally the term for the unidirectional parallel port";b[105]="B. form factor of the first 3.3V Pentium processors";c[105]="C. standard for high integrity digital sound cables and connectors";d[105]="D. reduced pin count and smaller sized laptop RAM module";ans[105]="1";q[106]="SPDIF is:";a[106]="A. originally the term for the unidirectional parallel port";b[106]="B. form factor of the first 3.3V Pentium processors";c[106]="C. standard for high integrity digital sound cables and connectors";d[106]="D. reduced pin count and smaller sized laptop RAM module";ans[106]="2";q[107]="SPP is:";a[107]="A. originally the term for the unidirectional parallel port";b[107]="B. form factor of the first 3.3V Pentium processors";c[107]="C. standard for high integrity digital sound cables and connectors";d[107]="D. reduced pin count and smaller sized laptop RAM module";ans[107]="0";q[108]="SSDL is:";a[108]="A. DVD in which the lasers can focus on two different layers per side and uses one side";b[108]="B. DVD in which the lasers only focus on one layer per side and uses one side";c[108]="C. multmedia CPU instruction that processes large blocks of data quickly";d[108]="D. molecules in solution of an LCD that align and block light current is applied";ans[108]="0";q[109]="SSE is:";a[109]="A. DVD in which the lasers can focus on two different layers per side and uses one side";b[109]="B. DVD in which the lasers only focus on one layer per side and uses one side";c[109]="C. multmedia CPU instruction that processes large blocks of data quickly";d[109]="D. molecules in solution of an LCD that align and block light current is applied";ans[109]="2";q[110]="SSSL is:";a[110]="A. DVD in which the lasers can focus on two different layers per side and uses one side";b[110]="B. DVD in which the lasers only focus on one layer per side and uses one side";c[110]="C. multmedia CPU instruction that processes large blocks of data quickly";d[110]="D. molecules in solution of an LCD that align and block light current is applied";ans[110]="1";q[111]="STN is:";a[111]="A. DVD in which the lasers can focus on two different layers per side and uses one side";b[111]="B. DVD in which the lasers only focus on one layer per side and uses one side";c[111]="C. multmedia CPU instruction that processes large blocks of data quickly";d[111]="D. molecules in solution of an LCD that align and block light current is applied";ans[111]="3";q[112]="SXGA is:";a[112]="A. technology used in the modern high quality active matrix LCD displays";b[112]="B. the serial port communications chip";c[112]="C. video standard that adds support for 1280 x 1024 pixel resolution";d[112]="D. ability to record some data to a CD-R but allow more to be added later";ans[112]="2";q[113]="TAO is:";a[113]="A. technology used in the modern high quality active matrix LCD displays";b[113]="B. the serial port communications chip";c[113]="C. video standard that adds support for 1280 x 1024 pixel resolution";d[113]="D. ability to record some data to a CD-R but allow more to be added later";ans[113]="3";q[114]="TFT is:";a[114]="A. technology used in the modern high quality active matrix LCD displays";b[114]="B. the serial port communications chip";c[114]="C. video standard that adds support for 1280 x 1024 pixel resolution";d[114]="D. ability to record some data to a CD-R but allow more to be added later";ans[114]="0";q[115]="UART is:";a[115]="A. technology used in the modern high quality active matrix LCD displays";b[115]="B. the serial port communications chip";c[115]="C. video standard that adds support for 1280 x 1024 pixel resolution";d[115]="D. ability to record some data to a CD-R but allow more to be added later";ans[115]="1";q[116]="UDF is:";a[116]="A. high speed general purpose expansion bus for external peripherals";b[116]="B. CD file system that supports formatting, deletion and addition of files";c[116]="C. one of the two standard USB 1.1 controllers";d[116]="D. high speed version of the old DMA chip but embedded in the ATA controller";ans[116]="1";q[117]="UDMA is:";a[117]="A. high speed general purpose expansion bus for external peripherals";b[117]="B. CD file system that supports formatting, deletion and addition of files";c[117]="C. one of the two standard USB 1.1 controllers";d[117]="D. high speed version of the old DMA chip but embedded in the ATA controller";ans[117]="3";q[118]="UHCI is:";a[118]="A. high speed general purpose expansion bus for external peripherals";b[118]="B. CD file system that supports formatting, deletion and addition of files";c[118]="C. one of the two standard USB 1.1 controllers";d[118]="D. high speed version of the old DMA chip but embedded in the ATA controller";ans[118]="2";q[119]="USB is:";a[119]="A. high speed general purpose expansion bus for external peripherals";b[119]="B. CD file system that supports formatting, deletion and addition of files";c[119]="C. one of the two standard USB 1.1 controllers";d[119]="D. high speed version of the old DMA chip but embedded in the ATA controller";ans[119]="0";q[120]="UXGA is:";a[120]="A. the measure of electricity when its polarity is regularly shifting";b[120]="B. the measure of electricity when its polarity does not shift";c[120]="C. the generic term for the content of the first sector of any partition";d[120]="D. video standard that defines the 1600 x 1200 resolution";ans[120]="3";q[121]="VAC is:";a[121]="A. the measure of electricity when its polarity is regularly shifting";b[121]="B. the measure of electricity when its polarity does not shift";c[121]="C. the generic term for the content of the first sector of any partition";d[121]="D. video standard that defines the 1600 x 1200 resolution";ans[121]="0";q[122]="VBR is:";a[122]="A. the measure of electricity when its polarity is regularly shifting";b[122]="B. the measure of electricity when its polarity does not shift";c[122]="C. the generic term for the content of the first sector of any partition";d[122]="D. video standard that defines the 1600 x 1200 resolution";ans[122]="2";q[123]="VDC is:";a[123]="A. the measure of electricity when its polarity is regularly shifting";b[123]="B. the measure of electricity when its polarity does not shift";c[123]="C. the generic term for the content of the first sector of any partition";d[123]="D. video standard that defines the 1600 x 1200 resolution";ans[123]="1";q[124]="VID is:";a[124]="A. CPU feature that allows two cores to run completely independent software";b[124]="B. allows the CPU to request its voltage requirements from the chipset automatically";c[124]="C. RAM chips modified and optimized for use in video controllers";d[124]="D. adjusts input voltage to a precise output level needed by some other circuit";ans[124]="1";q[125]="VRAM IS:";a[125]="A. CPU feature that allows two cores to run completely independent software";b[125]="B. allows the CPU to request its voltage requirements from the chipset automatically";c[125]="C. RAM chips modified and optimized for use in video controllers";d[125]="D. adjusts input voltage to a precise output level needed by some other circuit";ans[125]="2";q[126]="VRM is:";a[126]="A. CPU feature that allows two cores to run completely independent software";b[126]="B. allows the CPU to request its voltage requirements from the chipset automatically";c[126]="C. RAM chips modified and optimized for use in video controllers";d[126]="D. adjusts input voltage to a precise output level needed by some other circuit";ans[126]="3";q[127]="VT is:";a[127]="A. CPU feature that allows two cores to run completely independent software";b[127]="B. allows the CPU to request its voltage requirements from the chipset automatically";c[127]="C. RAM chips modified and optimized for use in video controllers";d[127]="D. adjusts input voltage to a precise output level needed by some other circuit";ans[127]="0";q[128]="WOL is:";a[128]="A. video standard that covers many nonstandard resolutions not in 4:3 aspect ratio";b[128]="B. protected mode feature that flags a region of RAM so it can never execute as code";c[128]="C. ability of a network card to move the system out of hibernate or suspend mode";d[128]="D. ability of a modem to move the system out of hibernate or suspend mode";ans[128]="2";q[129]="WOR is:";a[129]="A. video standard that covers many nonstandard resolutions not in 4:3 aspect ratio";b[129]="B. protected mode feature that flags a region of RAM so it can never execute as code";c[129]="C. ability of a network card to move the system out of hibernate or suspend mode";d[129]="D. ability of a modem to move the system out of hibernate or suspend mode";ans[129]="3";q[130]="WXGA is:";a[130]="A. video standard that covers many nonstandard resolutions not in 4:3 aspect ratio";b[130]="B. protected mode feature that flags a region of RAM so it can never execute as code";c[130]="C. ability of a network card to move the system out of hibernate or suspend mode";d[130]="D. ability of a modem to move the system out of hibernate or suspend mode";ans[130]="0";q[131]="XD is:";a[131]="A. video standard that covers many nonstandard resolutions not in 4:3 aspect ratio";b[131]="B. protected mode feature that flags a region of RAM so it can never execute as code";c[131]="C. ability of a network card to move the system out of hibernate or suspend mode";d[131]="D. ability of a modem to move the system out of hibernate or suspend mode";ans[131]="1";q[132]="XGA is:";a[132]="A. Socket with a latch mechanism so that no force is needed to insert or remove the CPU";b[132]="B. PS/2 video controller standard defined 1024 x 768 pixel resolution and high color";c[132]="C. standard for attachment of imaging peripherals to the laptop PC Card bus";d[132]="D. experimental high resolution video electronics standard that was never adopted";ans[132]="1";q[133]="ZIF is:";a[133]="A. Socket with a latch mechanism so that no force is needed to insert or remove the CPU";b[133]="B. PS/2 video controller standard defined 1024 x 768 pixel resolution and high color";c[133]="C. standard for attachment of imaging peripherals to the laptop PC Card bus";d[133]="D. experimental high resolution video electronics standard that was never adopted";ans[133]="0";q[134]="ZVI is:";a[134]="A. Socket with a latch mechanism so that no force is needed to insert or remove the CPU";b[134]="B. PS/2 video controller standard defined 1024 x 768 pixel resolution and high color";c[134]="C. standard for attachment of imaging peripherals to the laptop PC Card bus";d[134]="D. experimental high resolution video electronics standard that was never adopted";ans[134]="2";